Leveraging MathWorks Tools for HDL Code Generation and Verification

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  • Leveraging MathWorks Tools for HDL Code Generation and Verification

Etkinlik Programı ve İçeriği


Amani Darwish, Application Engineer

Short Resume of The Presenter

Amani Darwish ,PhD is an application engineer at MathWorks, specializing in FPGA and ASIC design and verification. Prior to MathWorks, Amani contributed to various projects in digital design and verification in leading tech companies after having spent over seven years in research and academia while completing her doctorate degree and postdoctoral fellowship.

Agenda

1. MBD : Model based design in ASIC and FPGA design.
2. HDL Code Generation : Generating and optimizing HDL Code for FPGA and ASIC Designs
3. Digital Signal Processing in MATLAB & Simulink
a. Exploring DSP HDL Toolbox and Filter Design HDL
b. Optimizing DSP Designs for Performance and Resource Utilization
4. Wireless Communication Design
a. Introduction to Wireless HDL Toolbox: Overview of designing and implementing wireless communication algorithms in HDL.
b. Simulation and Verification of Wireless Designs: Techniques for testing and verifying wireless communication systems, including the use of HDL Coder and HDL Verifier.
5. HDL Code Verification :
a. Co-Simulation with HDL Simulators : Integrates HDL designs with MATLAB or Simulink for simultaneous testing.
b. FPGA-in-the-loop (FIL) Verification : Testing HDL code on FPGA hardware
c. UVM Verification: Implementing Universal Verification Methodology for Robust Testing
6. SoC Blockset
a. Introduction to SoC Blockset
b. Integrating and simulating Software and Hardware design in Simulink
c. Performance Analysis and Resource Estimation
7. Q&A

Etkinlik Bilgileri

Tarih
27 Şubat 2024
Saat
14:00 – 15:30
Konuşmacı
Amani Darwish
Konum
Microsoft Teams
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